COMPANIES in the semiconductor industry often face a problem when crunch time comes, as they have to deliver their finished products to multiple clients within tight deadlines stipulated in the contracts.

What often results is a 'war for resources', as chip design engineers within the same company compete with their fellow colleagues in an attempt to obtain more servers to run their chip design process, so as to deliver their projects in time, observed Ng Harnhua, founder and vice-president of local technology start-up Plunify Pte Ltd.

But the launch of FPGAAccel, a tool which is used for the design and testing of field programmable gate array (FPGA) applications in the electronic design automation (EDA) industry, could allow chip design engineers around the world to breathe a collective sigh of relief as they end their 'war' on reconciliatory terms.

The product, which is offered by Plunify, hopes to benefit its users by shortening the time needed for their finished products to reach market, while reducing product development costs at the same time.

Plunify - a wordplay which is created by combining 'platforms' with 'unify' - aims to provide an integrated platform that results in greater business efficiency for chip designers in the semiconductor industry.

While working as a senior systems engineer, Mr Ng noted the challenges that resource constraints posed on chip design engineers. He was galvanised into coming up with a suitable solution to the problem and thus founded Plunify in 2009 with long-time friend Kirvy Teo, who takes up product development and customer relations responsibilities in the company.

The semiconductor chip design industry develops electronic products and components used in modern applications such as telecommunications equipment as well as medical devices, among others.

Before chip design engineers can even get their product out to be manufactured, they will have to first go through the chip design process where multiple steps and processes are involved.

Highlighting the challenges of working in the chip design industry, Mr Ng said: 'In each step, they will use multiple software tools which take a lot of time and computing resources to implement. However, engineers are also limited by resources to run and coordinate these different tasks.'

'With Plunify, we are offering them a way to run multiple things at the same time,' added Mr Ng. Using Plunify's FPGAAccel, chip design engineers can now run their chip design processes faster, while utilising less resources, he said.

Currently, most engineers operate their projects on shared servers on their companies' systems. However, as the combined cost of the servers together with licensed software needed by the engineers can often run up to 'hundreds of thousands', there is a limit to the number of servers that a chip maker can buy for his company. Plunify thus offers a way out of this dilemma by providing cloud computing capabilities to serve its clients.

With the servers operating on the cloud, Plunify allows chip design engineers to scale up to 30 servers instantly. In addition, as Plunify operates on a 'pay per use' pricing model, 'clients also get to streamline their development costs as they are only paying for what they use', explained Mr Ng.

As a result, its clients can stand to gain a reduction in chip design time by up to 30 times, while enjoying cost savings of up to 50 times, according to estimates provided by Plunify.

As the fast-moving electronics market is often filled with products that have short life cycles, shortening product development time could make a substantial impact on the bottom lines of these companies.

One of the key challenges that the young start-up faces when it makes its sales pitch to potential customers is the concern with security measures. An engineer by training, Mr Ng is aware of 'the natural wariness of sending data out to a third party among engineers'.

To counter the concerns regarding security, a combination of safety measures is currently being employed by Plunify. These include data encryption and key authentication as well as the splitting up of data into separate bunches to prevent malicious software from capturing the entire data in one fell swoop.

'In fact, after explaining to our potential clients the security measures that we have put in place, they often go: 'So what's next? How do I sign up?' added Mr Teo with a laugh.

Both entrepreneurs quit their day jobs in order to devote their full attention to the start-up. Mr Teo and Mr Ng view becoming entrepreneurs as heeding a calling.

Mr Teo counts as a serial entrepreneur, having first started a Web services company in 2004. For Mr Ng, Plunify represents his first foray into entrepreneurship. As such, he is encouraged by words of acknowledgement from peers within the industry who have been supportive of his entrepreneurial venture.

In addition, a $500,000 grant from Spring Singapore via the technology enterprise commercialisation scheme also provided the firm with angel funding during its early years.

With FPGAAccel as its flagship product, Plunify is poised to tap into the multi-billion EDA industry. According to a January report released by EDA Consortium, a trade association for electronic design companies, the annualised market value of the EDA industry - in which chip design engineers develop and analyse semiconductor chips - is estimated to be over US$6 billion.

A trend report from Gary Smith EDA, which provides market intelligence and advisory services, has also posted a compound annual growth rate (CAGR) of 8.2 per cent from 2007 to 2011 for the EDA industry.

While the company is still at pre-revenue stage, it has already seen users from 58 countries as part of its beta programme to solicit consumer feedback in order to get a market-ready product.

Plunify is also in talks with potential clients such as a Nasdaq-listed test equipment maker and an STI-listed satellite equipment company. As a result, the tech start-up anticipates that it will be closing its first deal soon.

Looking forward, Plunify has plans to secure its Series A round of funding in the first half of this year. The company hopes to expand its EDA capabilities in the future and has plans to introduce new features such as increasing collaboration and sharing of the chip design with other team members working on the same project.